A novel secure chaos-based pseudo random number generator based on ANN-based chaotic and ring oscillator: design and its FPGA implementation

This paper presents a novel, real time, high speed and robust chaos-based pseudo random number generator (PRNG) design using the structures of artificial neural network (ANN)-based 2D chaotic oscillator and ring oscillator. In this study, four different robust PRNGs have been implemented using four different approaches (TS-55, Elliott-93, Elliott-2, Cordic-LUT) of TanSig activation functions (TSAF) that have been used in the design of ANN-based 2D chaotic oscillators. The designs have been coded in VHDL using IEEE-754–1985 number standard. The PRNGs have been synthesized for Virtex-6 FPGA chip using Xilinx ISE Design Tools. After Place&Route operation, FPGA chip statistics and maximum operating frequencies have been presented. The maximum operating frequencies of the proposed PRNGs range between 184 and 241 MHz. The 1 Mbit of bit streams generated by PRNGs have been subjected to NIST-800–22 randomness tests. Among 4 different proposed PRNGs, the proposed PRNGs that designed using the Elliott-93 and Cordic-LUT approaches have successfully passed all NIST-800–22 tests and have a bit production rate of 241 Mbps. The proposed secure hybrid chaos-based PRNG structures were compared with similar studies conducted in the literature in recent years. According to the results, the proposed FPGA-based secure new chaotic PRNG structures are useful in cryptographic applications.