A fractional spur suppression technique in the fractional-N frequency synthesizer

被引:0
作者
Shui-long Huang
Hai-ying Zhang
机构
[1] Chinese Academy of Sciences,Institute of Microelectronics
来源
Analog Integrated Circuits and Signal Processing | 2011年 / 66卷
关键词
Spur; Frequency synthesizer; PFD; Charge pump;
D O I
暂无
中图分类号
学科分类号
摘要
A fractional spur suppression technique is presented based on the principle of spur generation, which makes the phase between the divider output and the reference be permanently coherent like integer-N frequency synthesizer, so a real lock is achieved. The spurious tones are strongly reduced without sacrificing the PLL bandwidth. The detailed scheme and corresponding key building blocks are deeply discussed. A 1.9 GHz frequency synthesizer with a 100 kHz bandwidth is implemented with the proposed way. SpectreVerilog simulation results show that the technique can reduce over 10 dBc/Hz spurious tones. So it is suitable for high spectral purity frequency synthesizer.
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页码:455 / 458
页数:3
相关论文
共 24 条
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