Design of an ultra small passive balun in CMOS 65 nm technology for 60 GHz applications

In this paper a new procedure for the spiral Marchand balun design is shown and demonstrated. The size reduction for this component is fundamental to obtain a high level of integration for the radio frequency analog circuits. This work shows a micro-structure that, working as a balun, achieves good performance in phase and amplitude balance, while maintaining minimum size. These results were achieved by performing an accurate theoretical analysis followed by an electromagnetic simulation of the structure. A set of equations are proposed to describe the component behavior and the measurements show a strong agreement with the simulations confirming the quality of the design flow. The balun shows a maximum of 1.5 dB of insertion loss, with 0.1 dB of amplitude imbalance. The phase imbalance reach as a maximum of 7° at 65 GHz. The total occupied area of the balun remain below to 0.01 mm2.