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- [2] Compact models and delay computation of sub-threshold interconnect circuits Analog Integrated Circuits and Signal Processing, 2015, 84 : 53 - 65
- [4] Investigating crosstalk in sub-threshold circuits ISQED 2007: PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2007, : 639 - +
- [5] Interconnect Technique for Sub-Threshold Circuits using Negative Capacitance Effect 2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2009, : 1122 - 1125
- [6] Sub-Threshold Charge Recovery Circuits 2010 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2010, : 138 - 144
- [7] Dual-Threshold Design of Sub-threshold Circuits 2013 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2013,
- [8] Fast, Accurate Variation-Aware Path Timing Computation for Sub-threshold Circuits PROCEEDINGS OF THE FIFTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2014), 2015, : 243 - 248
- [9] Increase of Crosstalk Noise Due to Imbalanced Threshold Voltage between NMOS and PMOS in Sub-Threshold Logic Circuits 2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
- [10] Timing Modeling for Digital Sub-threshold Circuits 2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010), 2010, : 299 - 302