Analysis of Device Parameter Variations in In1−xGaxAs Based Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET

被引：0
作者：
Parveen Kumar
Sanjeev Kumar Sharma
Balwinder Raj
机构：
[1] Dr. B.R. Ambedkar National Institute of Technology,Department of ECE
来源：
Transactions on Electrical and Electronic Materials | 2023年 / 24卷
关键词：
In; Ga; As; Subthreshold slope (SS); Nanowire MOSFET; Drain induced barrier leakage (DIBL); Cut-off frequency (f; ); Potential;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
The research focuses on the design and analysis of a Gate Stacked Double Metal Surrounding Gate Nanowire MOSFET (DMSG-NWFET) using In1−xGaxAs as the channel material. The performance of this MOSFET has been evaluated through simulations conducted using the silvaco ATLAS TCAD tool. The study examines the impact of Channel Length (L) and the ratio of L1/L on various DC characteristics, including Drain-Induced-Barrier-Leakage (DIBL), OFF-current (Ioff), ON-current (Ion), Subthreshold Slope (SS), and threshold voltage (Vth). In-depth analysis has been performed by varying the indium portion (1−x) in the In1−xGaxAs channel. Additionally, we investigate the radio frequency (RF) performances by considering the variation of the 'In' fraction and incorporating the cut-off frequency (fT). The investigation demonstrates that the In1−xGaxAs based Gate Stacked Double Metal Surrounding-Gate Nanowire MOSFET exhibits superior DC and RF performance when an optimized fraction of In (Indium). We believe that the proposed device structure holds significant promise for low power VLSI applications.
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页码：570 / 578
页数：8
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