A Simulation Study of the Effect of Trap Charges and Temperature on Performance of Dual Metal Strip Double Gate TFET

被引：0
作者：
Korra Nikhil
K Murali Chandra Babu
Jagritee Talukdar
Ekta Goel
机构：
[1] National Institute of Technology Warangal,Department of Electronics and Communication Engineering
[2] Department of Engineering,undefined
来源：
Silicon | 2024年 / 16卷 / 2期
关键词：
Short-channel effects; Temperature; Band to band tunneling (BTBT); Interface trap charge (ITC); On-state current;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
The TFET is a transistor with structure very similar to MOSFET but operates according on the Band-to-band tunneling (BTBT) principle plus, it’s better device for integrated circuit design as the SS<60 mV/dec is achievable but exhibits low on-state current (Ion)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$({\textbf {I}}\varvec{_{on}})$$\end{document}. To overcome the limitations different type of engineering methods are already existed and among them, Multi Gate Engineering is widely accepted. In this paper, for improving the effectiveness in terms of on-state current (Ion)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$({\textbf {I}}\varvec{_{on}})$$\end{document}, Transconductance (gm)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$({\textbf {g}}\varvec{_m})$$\end{document}, Gate-to-gate capacitance (Cgg)\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$({\textbf {C}}\varvec{_{gg}})$$\end{document} and Sub-threshold Slope (SS) A low work function metal strip is introduced in the oxide region near source-channel and drain-channel interactions (DM-DG-TFET). Moreover, the temperature effect is analyzed on the DM-DG-TFET with the variation of 250 K to 450 K. Eventually, the effect of Interface Trap Charges (ITC) is implemented on this architecture with different positive and negative vaules of the trap charge concentration. The findings of the TCAD simulation show that the proposed device (DM-DG-TFET) is effective in performance compared to conventional DG-TFET and SM-DG-TFET.
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页码：525 / 534
页数：9
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