A Computer-Aided Approach for Voltage Reference Circuit Design

This work presents a computer-aided design (CAD) approach for voltage reference circuits by controlling main characteristics, such as temperature coefficient, power consumption, mismatch caused by the manufacturing process, transistor area and output noise. The CAD tool and the proposed methodology allow the designer to obtain accurate and optimum initial circuit sizing, thereby reducing the large number of computer runs usually required in voltage reference circuit designs. An illustrative example was carried out in a 180 nm CMOS process and verified by post layout simulations, whose results were in close agreement with the tool predictions, as shown in this paper. The reference circuit achieves an output voltage of 500 mV, a temperature coefficient of 15.19 ppm/∘\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document} $$^\circ $$ \end{document}C over the temperature range of -40 ∘\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document} $$^\circ $$ \end{document}C to 100 ∘\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document} $$^\circ $$ \end{document}C, a maximum quiescent current of 5 μ\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document} $$\mu $$ \end{document}A, a power supply rejection ratio of -57 dB, and a line regulation of 0.250 % from 1.2 V to 1.8 V supply voltage. The chip occupies an area of 0.072 mm2\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document} $$^2$$ \end{document}.