共 56 条
[11]
Gaspard N J(2008)Integrating circuit level simulation and Monte-Carlo radiation transport code for single event upset analysis in SEU hardened circuitry IEEE Trans Nucl Sci 55 2886-2894
[12]
Jagannathan S(2012)Effect of P-well contact on N-well potential modulation in a 90nm bulk technology Sci China Tech Sci 55 1001-1006
[13]
Tang H(2011)Effect of transistor density and charge sharing on single-event transients in 90-nm bulk CMOS IEEE Trans Nucl Sci 58 2578-2584
[14]
Cannon E(2012)Novel layout technique for N-hit single-event transient mitigation via sourceextension IEEE Trans Nucl Sci 59 2859-2866
[15]
Weller R A(2012)Impact of circuit placement on single event transients in 65 nm bulk CMOS technology IEEE Trans Nucl Sci 59 2772-2777
[16]
Mendenhall M H(2014)Calculating the soft error vulnerabilities of combinational circuits by re-considering the sensitive area IEEE Trans Nucl Sci 61 646-653
[17]
Reed R A(2012)Device-physics-based analytical model for SET pulse in sub-100 nm bulk CMOS process Sci China Inf Sci 55 1461-1468
[18]
Hubert G(2014)A constrained layout placement approach to enhance pulse quenching effect in large combinational circuits IEEE Trans Dev Mater Rel 14 268-274
[19]
Duzellier S(2007)Predicting thermal neutron-induced soft errors in static memories using tcad and physics-based monte carlo simulation tools IEEE Electron Dev Lett 28 180-182
[20]
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