Quasi-Adiabatic SRAM Based Silicon Physical Unclonable Function

被引：0

作者：

Takahashi Y. ^{[1
]}

Koyasu H. ^{[1
]}

Kumar S.D. ^{[2
]}

Thapliyal H. ^{[2
]}

机构：

[1] Department of EECE, Faculty of Engineering, Gifu University, 1-1 Yanagido, Gifu

[2] University of Kentucky, Lexington, 40506, KY

来源：

SN Computer Science | 2020年 / 1卷 / 5期

关键词：

Adiabatic logic; Hardware security; Low-power; PUF;

D O I：

10.1007/s42979-020-00253-5

中图分类号：

学科分类号：

摘要：

Silicon Physical Unclonable Function (PUF) is a general hardware security primitive for security vulnerabilities. Recently, Quasi-adiabatic logic based physical unclonable function (QUALPUF) has ultra low-power dissipation; hence it is suitable to implement in low-power portable electronic devices such radio frequency identification (RFID) and wireless sensor networks (WSN), etc. In this paper, we present a design of 4-bit QUALPUF which is based on static random access memory (SRAM) for low-power portable electronic devices and then shows the post-layout simulation and measurement results. To evaluate the uniqueness and reliability, the 4-bit QUALPUF is implemented in 0.18 μ m standard CMOS process with 1.8 V supply voltage. The 4-bit QUALPUF occupies 58.7× 15.7 μ m 2 of layout area. The post-layout simulation results illustrate that the uniqueness calculated from the inter-die HDs of the 4-bit QUALPUF is 47.58%, the average reliability is 95.10%, and the the energy dissipation is 29.73 fJ/cycle/bit. The functional measurement results of the fabricated chip are the same as the post-layout simulation results. © 2020, The Author(s).

引用

共 9 条

[1]

Pappu R., Recht B., Taylor J., Gershenfeld N., Physical one-way functions, Nature, 297, pp. 2026-2030, (2001)

[2]

Kingma D.P., (2014)

[3]

Cao Y., Zhang L., Chang C.-H., Chen S., A low-power hybrid ro puf with improved thermal stability for lightweight applications, IEEE Trans Comput Aided Des Integr Circuits Syst, 34, 7, pp. 1143-1147, (2015)

[4]

Su Y., Holleman J., Otis B.P., A digital 1.6 pJ/bit chip identification circuit using process variations, IEEE J Solid-State Circuits, 43, 1, pp. 69-77, (2008)

[5]

The bistable ring PUF: A new architecture for strong physical unclonable functions, Proc. IEEE HOST 2011, June 5–6, 2011, pp. 134-141

[6]

Kumar S.D., Thapliyal H., QUALPUF: A novel quasi-adiabatic logic based physical unclonable function, Proc. ACM CISRC 2016, pp. 1-4

[7]

Younis S.G., Knight T.G., Asymptotically zero energy split-level charge recovery logic, Proc. Napa Valley, CA: IEEE Int. Workshop Low Power Design, pp. 177-182, (1994)

[8]

Kumar S.D., Thapliyal H., Mohammad A., Perumalla K.S., Design exploration of a symmetric pass gate adiabatic logic for energy-efficient and secure hardware, Integr VLSI J, 58, pp. 369-377, (2017)

[9]

Koyasu H., Takahashi Y., Current pass optimized symmetric pass gate adiabatic logic for cryptographic circuits, IPSJ Trans Syst LSI Des Methodol, 12, pp. 50-52, (2019)

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