A wideband CMOS power amplifier with 23.3 dB S21, 10.6 dBm PSAT and 12.3 % PAE for 60 GHz WPAN and 77 GHz automobile radar systems

A wideband power amplifier (PA) for 60 and 77 GHz direct-conversion transceiver using standard 90 nm CMOS technology is reported. The PA comprises a cascode input stage with a wideband T-type input-matching network and inductive interconnection and load, followed by a common-source (CS) gain stage and a CS output stage. To increase the saturated output power (PSAT) and power-added efficiency (PAE), the output stage adopts a two-way power dividing and combining architecture. Instead of the area-consumed Wilkinson power divider and combiner, miniature low-loss transmission-line inductors are used at the input and output terminals of each of the output stages for wideband input and output impedance matching to 100 Ω. This in turn results in further PSAT and PAE enhancement. The PA consumes 92.2 mW and achieves maximum power gain (S21) of 23.3 dB at 56 GHz, and S21 of 21.7 and 14 dB, respectively, at 60 and 77 GHz. In addition, the PA achieves excellent saturated output power (PSAT) of 10.6 dBm and maximum power added efficiency (PAE) of 12.3 % at 60 GHz. At 77 GHz, the PA achieves excellent PSAT of 10.4 dBm and maximum PAE of 6 %. These results demonstrate the proposed wideband PA architecture is very promising for 60 GHz wireless personal local network and 77 GHz automobile radar systems.