Impact of temperature on analog/RF, linearity and reliability performance metrics of tunnel FET with ultra-thin source region

被引:0
|
作者
Prabhat Singh
Dharmendra Singh Yadav
机构
[1] NIT Hamirpur,Electronics and Communication Engineering Department
来源
Applied Physics A | 2021年 / 127卷
关键词
Ultra-thin source; Band-to-band tunneling (B2BT); Linearity; Reliability; Source/channel interface (S–C-I); Drain/channel interface (D–C-I); Ambipolar current;
D O I
暂无
中图分类号
学科分类号
摘要
In this script, authors affirm a novel structure of tunnel FET in which a lightly doped channel region completely bounds the ultra-thin finger-like source region to enhance the tunneling probability with an increased tunneling interface area. TFETs have become common in power-constrained applications due to the minimal subthreshold swing (SS) and low OFF current (Ioff\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{off}}$$\end{document}) with low ON-state driving current (Ion\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{on}}$$\end{document}) and ambipolar conduction concerns. Decreasing device dimensions is becoming more crucial for protecting device linearity and reliability under varying manufacturing and environmental conditions. However, changes in ambient temperature (T) imply its efficiencies, such as linearity distortion, analogue, and high-frequency performance, which must be thoroughly investigated. The impactful analysis was carried out for manuscript for assuring analog/RF performance, linearity distortion, and reliability of F-shaped TFET. Extensive investigations have been performed to check device susceptibility towards temperature ranging from 250 to 400 K by using the 2D-TCAD tool. For this, various critical parameters like Ion\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{on}}$$\end{document}, Iambi\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{ambi}}$$\end{document}, SS, parasitic capacitances, threshold voltage (Vth\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$V_\mathrm{{th}}$$\end{document}), Ion/Ioff\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{on}}/I_\mathrm{{off}}$$\end{document} ratio, transconductance (gm\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m}$$\end{document}), output transconductance (gds\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_\mathrm{{ds}}$$\end{document}), higher-order gm\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m}$$\end{document} (gm2\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m2}$$\end{document} and gm3\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$g_{m3}$$\end{document}), intrinsic gain (IG), cut-off frequency (ft\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$f_{t}$$\end{document}), gain bandwidth product (GBP), transconductance generation factor (TGF), transit time (TT), transconductance frequency product (TFP), VIP2, VIP3, IIP3, IMD3 and 1-dB compression point have been investigated for temperature sensitivity analysis for the proposed device. Furthermore, reliability analysis is also performed, which shows that with a significant change in second harmonics, rising temperature is seen to be unfavorable for the SS, Iambi\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{ambi}}$$\end{document} and Ion/Ioff\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$I_\mathrm{{on}}/I_\mathrm{{off}}$$\end{document} ratio.
引用
收藏
相关论文
共 50 条
  • [11] Effect of Temperature and Gate Stack on the Linearity and Analog Performance of Double Gate Tunnel FET
    Narang, Rakhi
    Saxena, Manoj
    Gupta, R. S.
    Gupta, Mridula
    TRENDS IN NETWORKS AND COMMUNICATIONS, 2011, 197 : 466 - +
  • [12] Effect of Curie Temperature on Ferroelectric Tunnel FET and Its RF/Analog Performance
    Das, Basab
    Bhowmick, Brinda
    IEEE TRANSACTIONS ON ULTRASONICS FERROELECTRICS AND FREQUENCY CONTROL, 2021, 68 (04) : 1437 - 1441
  • [13] Influence of Germanium source on dopingless tunnel-FET for improved analog/RF performance
    Cecil, Kanchan
    Singh, Jawar
    SUPERLATTICES AND MICROSTRUCTURES, 2017, 101 : 244 - 252
  • [14] RF/analog and linearity performance analysis of SiGe source ETLTFET with emphasis on temperature
    Debnath, Radhe Gobinda
    Baishya, Srimanta
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2022, 113 (01) : 61 - 72
  • [15] RF/analog and linearity performance analysis of SiGe source ETLTFET with emphasis on temperature
    Radhe Gobinda Debnath
    Srimanta Baishya
    Analog Integrated Circuits and Signal Processing, 2022, 113 : 61 - 72
  • [16] Impact of gate-on-source misalignment on the analog and digital performance of tunnel FET
    Ahmed Shaker
    Muhammad Elgamal
    Mostafa Fedawy
    Hesham Kamel
    Pramana, 2021, 95
  • [17] Impact of gate-on-source misalignment on the analog and digital performance of tunnel FET
    Shaker, Ahmed
    Elgamal, Muhammad
    Fedawy, Mostafa
    Kamel, Hesham
    PRAMANA-JOURNAL OF PHYSICS, 2021, 95 (03):
  • [18] Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET
    Kumari, Pallavi
    Raj, Anand
    Priyadarshani, Kumari Nibha
    Singh, Sangeeta
    MICROELECTRONICS JOURNAL, 2021, 113
  • [19] RF/Analog and Linearity Performance Evaluation of Lattice-matched Ultra-thin AlGaN/GaN Gate Recessed MOSHEMT with Silicon Substrate
    Khan, Abdul Naim
    Jena, K.
    Routray, S.
    Chatterjee, G.
    SILICON, 2022, 14 (14) : 8599 - 8608
  • [20] RF/Analog and Linearity Performance Evaluation of Lattice-matched Ultra-thin AlGaN/GaN Gate Recessed MOSHEMT with Silicon Substrate
    Abdul Naim Khan
    K. Jena
    S. Routray
    G. Chatterjee
    Silicon, 2022, 14 : 8599 - 8608