FPGA implementation of digital filters synthesized using the FRM technique

被引：20
作者：
Yong Ching Lim
Ya Jun Yu
Huan Qun Zheng
Say Wei Foo
机构：
[1] Dept. of Electrical and Comp. Eng., National University of Singapore
[2] Sch. of Elec. and Electronics Eng., Nanyang Technological University
来源：
Circuits, Systems and Signal Processing | 2003年 / 22卷 / 2期
关键词：
Digital filters; FIR filters; FRM technique;
D O I：
10.1007/s00034-004-7027-z
中图分类号：
学科分类号：
摘要：
The effective length of a filter designed using the frequency-response masking (FRM) technique is very long and requires a very large number of delay elements. In this paper, we present some useful techniques for reducing the data transfer between the field programmable gate array (FPGA) and external memory when the random logic is implemented using the FPGA and the delay elements are implemented using an external memory such as dynamic random access memory.
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页码：211 / 218
页数：7
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