Design of a wideband low-power continuous-time ΣΔ modulator in 90 nm CMOS technology

被引：0
作者：
Fang Chen
Till Kuendiger
Shervin Erfani
Majid Ahmadi
机构：
[1] University of Windsor,Department of Electrical and Computer Engineering
[2] Carleton University,Department of Electronics
来源：
Analog Integrated Circuits and Signal Processing | 2008年 / 54卷
关键词：
Continuous-time; Sigma-delta modulator; Analog-to-digital converter; Wideband; Low power; 90nm CMOS;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
The design of a wideband low-power continuous-time (CT) sigma-delta modulator (ΣΔM) is presented. At system level, an improved direct design method is used which allows direct design of the modulator in continuous-time domain. The modulator employs a low-latency flash quantizer to minimize excess loop delay. Digital-to-analog (DAC) trimming technique is used to correct the quantizer offset error, which permits minimum-sized transistors to be used for fast and low-power operation. The modulator is designed in 90 nm CMOS process with single 1.0-V power supply. It achieves a dynamic range (DR) of 75 dB and a signal-to-noise-and-distortion-ratio (SNDR) of 70 dB in a 25 MHz signal bandwidth with 16.4 mW power dissipation.
引用
收藏
页码：187 / 199
页数：12
相关论文
共 42 条
[1]  
Breems L. J.(2004)A cascaded continuous-time ΣΔ modulator with 67-dB dynamic range in 10-MHz bandwidth IEEE Journal of Solid-State Circuits 39 2152-2160
[2]  
Rutten R.(2007)A design-optimized continuous-time delta-sigma ADC for WLAN applications IEEE Transactions on Circuits and Systems 54 209-217
[3]  
Wetzker G.(2004)70-mW 300-MHz CMOS continuous-time ΣΔ ADC with 15-MHz bandwidth and 11 bits of resolution IEEE Journal of Solid-State Circuits 39 1056-1063
[4]  
Schoofs R.(2006)A time-interleaved continuous-time ΔΣ modulator with 20-MHz signal bandwidth IEEE Journal of Solid-State Circuits 41 1578-1588
[5]  
Steyaert M. S. J.(2006)A 32-mW 320-MHz continuous-time complex delta-sigma ADC for multi-mode wireless-LAN receivers IEEE Journal of Solid-State Circuits 41 339-351
[6]  
Sansen W. M. C.(2006)A 20-mW 640-MHz cmos continuous-time ΣΔ ADC with 20-MHzsignal bandwidth, 80-dB dynamic range and 12-bit ENOB IEEE Journal of Solid-State Circuits 41 2641-2649
[7]  
Patón S.(1993)An empirical study of high-order single-bit delta-sigma modulators IEEE Transactions on Circuits and Systems II 40 461-466
[8]  
Giandomenico A. D.(2004)A 25-MS/s 14-b 200-mW ΣΔ modulator in 0.18-μm CMOS IEEE Journal of Solid-State Circuits 39 2161-2169
[9]  
Hernández L.(1999)Analysis of timing jitter in bandpass sigma-delta modulators IEEE Transactions on Circuits and Systems II 46 991-1001
[10]  
Pötscher A. W. T.(2004)A continuous-time ΣΔ modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth IEEE Journal of Solid-State Circuits 39 75-86
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