GEORG: VLSI circuit partitioner with a new genetic algorithm framework

被引:0
|
作者
Byung-Ro Moon
Yun-Sik Lee
Chun-Kyung Kim
机构
[1] Seoul National University,Department of Computer Science
[2] AST Gr.,Design Technology Research Laboratory
[3] LG Semicon Co.,undefined
[4] Ltd,undefined
来源
关键词
Circuit partitioning; genetic algorithm; geographic crossover; two-dimensional crossover;
D O I
暂无
中图分类号
学科分类号
摘要
This paper suggests a new framework of multidimensional genetic algorithm and applies it to the real-world problem of very large scale integration (VLSI) partitioning. The framework consists of a new multidimensional genetic operator, called geographic crossover, and a new genetic encoding scheme. Geographic crossover enables more powerful creation of new solutions by allowing a diverse mixture of parent solutions. Its theoretical validity is proved based on a new view of crossover. The new genetic encoding scheme helps space search by effectively utilizing geographical linkages of genes. The new framework can be incorporated into most existing genetic algorithm (GA) implementations just by replacing the crossover module and leaving the other modules intact. For a test suite of 11 ACM/SIGDA VLSI circuit␣partitioning benchmark circuits, the GA under this framework significantly outperformed recently published state-of-the-art methods as well as a previous GA on linear string.
引用
收藏
页码:401 / 412
页数:11
相关论文
共 50 条
  • [1] GEORG: VLSI circuit partitioner with a new genetic algorithm framework
    Moon, BR
    Lee, YS
    Kim, CK
    JOURNAL OF INTELLIGENT MANUFACTURING, 1998, 9 (05) : 401 - 412
  • [2] A GENETIC ALGORITHM-BASED CIRCUIT PARTITIONER FOR MCMS
    MAJHI, AK
    PATNAIK, LM
    RAMAN, S
    MICROPROCESSING AND MICROPROGRAMMING, 1995, 41 (01): : 83 - 96
  • [3] Adaptive genetic algorithm for VLSI circuit partitioning
    Democritus Univ of Thrace, Xanthi, Greece
    Int J Electron, 2 (205-214):
  • [4] AN ADAPTIVE GENETIC ALGORITHM FOR VLSI CIRCUIT PARTITIONING
    KARAFYLLIDIS, I
    THANAILAKIS, A
    INTERNATIONAL JOURNAL OF ELECTRONICS, 1995, 79 (02) : 205 - 214
  • [5] High Performance Genetic Algorithm for VLSI Circuit Partitioning
    Simona, Dinu
    ADVANCED TOPICS IN OPTOELECTRONICS, MICROELECTRONICS, AND NANOTECHNOLOGIES VIII, 2016, 10010
  • [6] A Genetic Algorithm Framework Applied to Quantum Circuit Synthesis
    Ruican, Cristian
    Udrescu, Mihai
    Prodan, Lucian
    Vladutiu, Mircea
    NATURE INSPIRED COOPERATIVE STRATEGIES FOR OPTIMIZATION (NICSO 2007), 2008, 129 : 419 - 429
  • [7] Structural cell-based VLSI circuit design using a genetic algorithm
    Arslan, T
    Horrocks, DH
    Ozdemir, E
    ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4, 1996, : 308 - 311
  • [8] VLSI implementation of Genetic Algorithm
    Ramamurthy, P
    Vasanth, J
    COMPUTER APPLICATIONS IN INDUSTRY AND ENGINEERING, 2003, : 298 - 301
  • [9] Genetic VLSI circuit partitioning with dynamic embedding
    Moon, BR
    Kim, CK
    FIRST INTERNATIONAL CONFERENCE ON KNOWLEDGE-BASED INTELLIGENT ELECTRONIC SYSTEMS, PROCEEDINGS 1997 - KES '97, VOLS 1 AND 2, 1997, : 461 - 469
  • [10] A Discrete FireFly Algorithm for VLSI Circuit Partitioning
    Sharma, Pradip Kumar
    Kaur, Maninder
    2014 INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS), 2014,