共 141 条
- [1] Aminzadeh H(2020)All–MOS self-powered subthreshold voltage reference with enhanced line regulation AEU-Int. J. Electron. Commun. 122 282-284
- [2] Aminzadeh H(2020)Self-biased nano-power four-transistor current and voltage reference with a single resistor Electron. Lett. 56 1082-1100
- [3] Aminzadeh H(2021)Subthreshold reference circuit with curvature compensation based on the channel length modulation of MOS devices Int. J. Circuit Theory Appl. 50 670-674
- [4] Banba H(1999)A CMOS bandgap reference circuit with sub-1-V operation IEEE J. Solid-State Circuits 34 85-102
- [5] Shiga H(2003)An integrated CAD methodology for yield enhancement of VLSI CMOS circuits including statistical device variations Analog Integr. Circ. Sig. Process 37 582-596
- [6] Umezawa A(1999)Parametric yield formulation of MOS IC's affected by mismatch effect IEEE Trans. Comput. Aid. Des. Integr. Circuits Syst. 18 680-685
- [7] Miyaba T(2002)Layout-based statistical modeling for the prediction of the matching properties of MOS transistors IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 49 779-795
- [8] Tanzawa T(2018)A portable class of 3-transistor current references with low-power sub-0.5 V operation Int. J. Circuit Theory Appl. 46 3656-3669
- [9] Atsumi S(2020)A 0.5-V supply, 36 nW bandgap reference with 42 ppm/°C average temperature coefficient within −40 °C to 120 °C IEEE Trans. Circuits Syst. I Regul. Pap. 67 151-154
- [10] Conti M(2003)A low-voltage low-power voltage reference based on subthreshold MOSFETs IEEE J. Solid-State Circuits 38 101-155