Random data-aware flash translation layer for NAND flash-based smart devices

被引：0
作者：
Se Jin Kwon
Hyung-Ju Cho
Sungsoo Kim
Tae-Sun Chung
机构：
[1] Ajou University,Department of Computer Engineering
[2] Ajou University,Department of Information & Computer Engineering
来源：
The Journal of Supercomputing | 2013年 / 66卷
关键词：
High-performance computer design; Smart devices; Middleware; Flash memory system; FTL;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
The design of flash memory systems for smart devices differs significantly from traditional storage systems, because most updates involve the random data. A previously proposed algorithm known as Switchable Address Translation (SAT) enhances the performance of multimedia storage devices; however, it exhibits low space utilization and executes intense monitoring. In this paper, we propose the Random Data-Aware Flash Translation Layer (RDA), which enhances the performance and durability of smart devices. RDA improves low space utilization using the state transition. Furthermore, RDA prolongs the durability of the flash memory by spreading out the random data. According to our experiment results, RDA reduces the total number of erase operations and narrows the deviation of erase operations between the physical blocks, when compared to SAT.
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页码：81 / 93
页数：12
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