Gate dielectric reliability and instability in GaN metal-insulator-semiconductor high-electron-mobility transistors for power electronics

GaN field-effect transistors with impressive power switching characteristics have been demonstrated. Preventing their widespread field deployment are reliability and instability concerns. Some emanate from the use of a dielectric in the gate stack. Under typical operation, the gate dielectric comes periodically under intense electric field. This causes trapping and detrapping of electrons and introduces transient shifts in the threshold voltage, a phenomenon known as Bias-Temperature Instability (BTI). A high electric field also results in the formation of defects inside the dielectric. Over time, the defects accumulate and eventually result in the abrupt creation of a conducting path that shorts the dielectric and renders the device inoperable. This process, known as Time-Dependent Dielectric Breakdown (TDDB), often imposes a maximum lifetime for the FET technology. This article presents a methodology for the study of BTI and TDDB in insulated-gate GaN FETs. Our findings paint a picture of BTI and TDDB that in many respects is similar to that of Si transistors but with some unique characteristics. Understanding the physics and developing appropriate lifetime models is essential to enabling the deployment of this important new power electronics technology.