Novel low quantum cost reversible logic based full adders for DSP applications

被引:3
作者
Parameshwara M.C. [1 ]
Nagabushanam M. [2 ]
机构
[1] Department of Electronics and Communication, Vemana Institute of Technology, VTU, Koramangala, Bengaluru, 560034, Karnataka
[2] Department of Electronics and Communication, Ramaiah Institute of Technology (Autonomous), VTU, Bengaluru, 560054, Karnataka
关键词
Full adder; Low-power; Quantum cost; Quantum gates; Reversible logic;
D O I
10.1007/s41870-021-00762-3
中图分类号
学科分类号
摘要
Low-power is a paramount concern in the design of ‘digital signal processor’ (DSP) for the next generation portable electronic gadgets. The quest to achieve low-power with required speed has made the researchers look into various low-power circuit design techniques. In more recent years, reversible logic (RL) has emerged as an alternative and promising technique in the design of low-power DSPs for multimedia applications. The RL finds vast applications in the fields of nanotechnology, low-power CMOS circuit design, approximate computing, optical computing, and quantum computing, etc. The full adder (FA) being a primitive element of DSP plays a significant role in the contribution of the overall power of the system under consideration. This paper presents the design and comparison of state-of-the-art 1-bit FA architectures (FAAs) using standard reversible logic gates (RLGs). The designed FAAs herein referred to as ‘Reversible-logic based FAs’ (RFAs). The functionality of RFAs has been verified through Verilog HDL based simulations using Cadence’s NC simulator. The quantum merits of each RFA have also been assessed through the quantum gate metrics (QGMs). © 2021, Bharati Vidyapeeth's Institute of Computer Applications and Management.
引用
收藏
页码:1755 / 1761
页数:6
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