An astatic phase-locked system for digital signal processors: circuit design and stability

被引：0
|
作者：
G. A. Leonov
S. M. Seledzhi
机构：
[1] St. Petersburg State University,
来源：
Automation and Remote Control | 2005年 / 66卷
关键词：
Mechanical Engineer; Signal Processer; System Theory; Digital Signal; Digital Signal Processer;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
Block-circuits of phase-locked systems, which act as frequency synthesizers and misphasing correctors, for timing oscillators of digital signal processers are designed. The characteristic of the phase detector is determined with a timing pulse multiplier and a low-frequency filter. Astatic correctors are introduced. The global stability of the synthesized system is investigated by the Lyapunov direct method.
引用
收藏
页码：348 / 355
页数：7
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