Short Complete Fault Detection Tests for Logic Networks with Fan-In Two

被引:0
|
作者
Popkov K.A. [1 ]
机构
[1] Keldysh Institute of Applied Mathematics, Miusskaya pl. 4, Moscow
基金
俄罗斯科学基金会;
关键词
arbitrary stuck-at fault; complete fault detection test; logic network;
D O I
10.1134/S1990478919010137
中图分类号
学科分类号
摘要
It is established that we can implement almost every Boolean function on n variables by a logic network in the basis {x&y, x ∨ y, x ⨁ y, 1}, allowing a complete fault detection test with length at most 4 under arbitrary stuck-at faults at outputs of gates. The following assertions are also proved:We can implement each Boolean function on n variables by a logic network in the basis {x&y, x ∨ y, x ⨁ y, 1} (in the basis {x&y, x ∨ y, x ∨ y, x ⨁ y}) containing at most one dummy variable and allowing a complete fault detection test of length at most 5 (at most 4, respectively) under faults of the same type. © 2019, Pleiades Publishing, Ltd.
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页码:118 / 131
页数:13
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