Realization of Boolean Functions Using Heterojunction Tunnel FETs

In this paper, a compact implementation of logic gates using dual pocket-heterojunction tunnel FET (HTJ-TFET) have been proposed for digital applications. The gate to source overlap technique is used and chosen appropriate gate work function of HTJ-TFET structure to implement logic functions such as AND, OR, NAND and NOR. The OR and NAND logic functions are realized with n- and p-type HTJ-TFET structure by operating both the gates independently; however, for realizing AND and NOR logic functions, the gate to source overlap technique is employed. The behavior of each logic gate is demonstrated with transfer characteristic and energy band-diagram of HTJ-TFET. The high ION current is considered as logic “1”; whereas, low IOFF current is considered as logic “0”. From 2-D simulation, it is shown that the maximum tunneling is possible only for input combination “11” in OR logic gate; however, for NOR logic gate, the input combination “00” contributes high ION current and hence, ION/IOFF ratio which is in the range of 108. For OR and NAND logic functions, the ION/IOFF ratio is obtained 1012. Hence, this work is useful for realizing high speed compact logic functions using single transistor such as HTJ-TFET.