Performance evaluation of an ultra-high speed adder based on quantum-dot cellular automata

Quantum-dot cellular automata (QCA) is among the most promising nanotechnologies as the substitution for the current metal oxide semiconductor field effect transistor based devices. Therefore, lots of attention have been paid to different aspects to improve the efficiency of QCA circuits. In this way, the adder circuits are widely investigated since their performance can directly affect the whole digital system performance. In this paper, a new ultra-high speed QCA full adder cell is proposed based on multi-layer structures. The proposed full adder cell is simple in design using 3-input Exclusive-OR (TIEO), which computes the Sum bits and Majority gate, which computes the Carry bits. To verify the efficacy of the presented full adder cell, it is considered, the main constructing block in 4-bit ripple carry adder circuit. Hence, significant improvements in terms of area and cell count have been achieved. Particularly simulation results show 20% and 1.8% reduction respectively in the area and cell count overhead. Detailed performance evaluation and structural analysis are performed in different aspects to authenticate the proposed circuits (one-bit and 4-bit) having superb performance in comparison to previously reported works. QCADesigner CAD tool has been used to verify the correct functionality of the proposed architectures. © 2019, Bharati Vidyapeeth's Institute of Computer Applications and Management.