Design Considerations and Optimization of Electrostatic Doped Ferroelectric Nanotube Tunnel FET: Analog and Noise Analysis

被引：0
作者：
Ashok Kumar Gupta
Ashish Raman
Naveen Kumar
机构：
[1] National Institute of Technology,Department of Electronics and Communications, Dr. B. R. Ambedkar
来源：
Silicon | 2022年 / 14卷
关键词：
TFET; Nanowire TFET; Nanotube TFET; Electrostatic doped; Auto-correlation function (ACF); Noise Variation; HfO; Ferroelectric; Cross-correlation function (CCF);
D O I：
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中图分类号：
学科分类号：
摘要：
This paper proposed the electrostatically doped Ferroelectric Nanotube Tunnel FET (FE-NT-TFET). The proposed device is electrostatically doped, so the applied source voltage is -1.2 V (VS = -1.2 V). Device variables like potential variation, electric-field energy, non-local band to band electron tunnel (BTBT) rates, electron carrier concentration, and hole carrier concentration have been investigating. Analog variables like drain current (IDS), ION/IOFF current ratio, ON current (ION), sub-threshold slope (SS), OFF current (IOFF), a threshold voltage (VTH), and average sub-threshold slope (AVSS) have been discussed. The noise parameter such as real impedance (Z0), minimum noise figure (NF), auto/cross-correlation function (ACF & CCF) has been discussed. To obtain the steep sub-threshold slope (SS) and higher drain current (IDS) ferroelectric material is used in the place of the gate oxide. Ferroelectric material HfO2 is used in the proposed FE-NT-TFET device. HfO2 is used because of compatibility with the CMOS flow. The proposed FE-NT-TFET device shows the higher current 62.4uA/um for VDS = 1.2 V and steep sub-threshold slope (SS) 7 mV/decade. The proposed device shows the average sub-threshold slope (AVSS) 22.9 mV/decade. The proposed FE-NT-TFET device shows the lower OFF current (IOFF) order of 10−19A/um and higher ION/IOFF current order of 1013.
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页码：10357 / 10373
页数：16
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  • [1] Toh EH(2007)Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization Applied physics letters 90 263507-301
  • [2] Wang GH(2011)Direct and indirect band-to-band tunneling in germanium-based TFETs IEEE Trans Electron Devices 59 292-677
  • [3] Samudra G(2014)III–V compound semiconductor transistors—from planar to nanowire structures Mrs Bulletin 39 668-128
  • [4] Yeo YC(2016)Configurable electrostatically doped high performance bilayer graphene tunnel FET IEEE Journal of the Electron Devices Society 4 124-4460
  • [5] Kao KH(2019)Performance Assessment of the charge-plasma-based cylindrical GAA Vertical nanowire TFET with Impact of interface trap charges IEEE Trans Electron Devices 66 4453-10642
  • [6] Verhulst AS(2017)Gate All Around Nanowire TFET with High ON/OFF Current Ratio Materials Today: Proceedings 4 10637-364
  • [7] Vandenberghe WG(2019)Design and performance analysis of dual-gate all around core-shell nanotube TFET Superlattices Microstruct 125 356-795
  • [8] Soree B(2020)Design and Performance Optimization of Novel Core-Shell Dopingless GAA-Nanotube TFET With Si 0.5 Ge 0.5-Based Source IEEE Transactions on Electron Devices 67 789-4432
  • [9] Groeseneken G(2019)Nanotube tunneling fet with a core source for ultrasteep subthreshold swing: A simulation study IEEE Trans Electron Devices 66 4425-1856
  • [10] De Meyer K(2015)InAs/Si hetero-junction nanotube tunnel transistors Sci Rep 5 9843-2413
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