Investigation of Novel Low Bandgap Source Material for Hetero-dielectric GAA-TFET with Enhanced Performance

被引:0
作者
Afreen Anamul Haque
Varun Mishra
Yogesh Kumar Verma
Santosh Kumar Gupta
机构
[1] Graphic Era Deemed to be University,
[2] Lovely Professional University,undefined
[3] Motilal Nehru National Institute of Technology Allahabad,undefined
来源
Silicon | 2022年 / 14卷
关键词
Low band-gap; Hetero-junction; Hetero-dielectric; Gate-all-around; Tunnel FET;
D O I
暂无
中图分类号
学科分类号
摘要
The customary MOSFETs can be supplanted by Tunnel Field Effect Transistors (TFETs), because of its capability of accomplishing sub-threshold swing (SS) under 60 mV/decade. Be that as it may, distinct requirements are to be met to ameliorate the operation of TFET with regard to greater on state current (ION) and smaller values of voltage (Vth). In this paper, the gate-all-around (GAA) TFET with hetero-junction at the source as the source is made with a low band-gap material i.e. Mg2Si is investigated and its comparative analysis has been done with the GAA-TFET with Si-source. Moreover, hetero-dielectric structure with high-k dielectric such as HfO2 has been implemented for the enhancement of the electrical performance of the device. The proposed device provides ION as 7.16 µA, SS of 7 mV/decade, Vth of 0.399 V and switching ratio of the order of 1013. The results obtained portray finer performance of Mg2Si/Si hetero-junction TFET when contrasted with ordinary Si GAA-TFET, regarding dc characteristics like ION, SS, Vth and the switching ratio ION/IOFF.
引用
收藏
页码:8785 / 8792
页数:7
相关论文
共 70 条
  • [1] Ionescu AM(2011)Tunnel field-effect transistors as energy-efficient electronic switches Nature 61 2599-2603
  • [2] Riel H(2014)Compact analytical drain current model of gate-all-around nanowire tunneling FET IEEE Trans Electron Devices 125 1-12
  • [3] Vishnoi R(2002)Beyond the conventional transistor IBM J Res Dev 13 1305-1310
  • [4] Kumar MJ(2010)Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor J. Appl. Phys. 61 2264-2270
  • [5] Wong HSP(2014)2-D analytical model for the threshold voltage of a tunneling FET with localized charges IEEE Trans Electron Devices 110 162-170
  • [6] Verhulst AS(2019)RF analysis and temperature characterization of pocket doped L-shaped gate tunnel FET Appl Phys A Mater Sci Process 109 154-160
  • [7] Sorée B(2019)Design and analysis of high k silicon nanotube tunnel FET device IET Circuits Devices Syst 33 1-11
  • [8] Leonelli D(2014)A pseudo-2-D-analytical model of dual material gate all-around nanowire tunneling FET IEEE Trans Electron Devices undefined undefined-undefined
  • [9] Vandenberghe WG(2019)Temperature-dependent gate-induced drain leakages assessment of dual-metal nanowire field-effect transistor - analytical model IEEE Trans Electron Devices undefined undefined-undefined
  • [10] Groeseneken G(2015)Analytical surface potential modeling and simulation of junction-less double gate (JLDG) MOSFET for ultra low-power analog/RF circuits Microelectron J undefined undefined-undefined