A development methodology for embedded systems based on RT-DEVS

被引:11
作者
Furfaro A. [1 ]
Nigro L. [1 ]
机构
[1] Laboratorio di Ingegneria del Software, DEIS, Università della Calabria
关键词
DEVS; Embedded control systems; !text type='Java']Java[!/text; Model checking; Model continuity; Real-time constraints; Temporal analysis; Timed automata;
D O I
10.1007/s11334-009-0085-4
中图分类号
学科分类号
摘要
This work is concerned with modelling, analysis and implementation of embedded control systems using RT-DEVS, i.e. a specialization of classic discrete event system specification (DEVS) for real-time. RT-DEVS favours model continuity, i.e. the possibility of using the same model for property analysis (by simulation or model checking) and for real time execution. Special case tools are reported in the literature for RT-DEVS model analysis and design. In this work, temporal analysis of a model exploits a translation in Uppaal timed automata for exhaustive verification. For large models a simulator was realized in Java which directly stems from RT-DEVS operational semantics. The same concerns are at the basis of a real-time executive. The paper describes the proposed RT-DEVS development methodology and clarifies its implementation status. The approach is demonstrated by applying it to an embedded system example which is analyzed through model checking and implemented in Java. Finally, research directions which deserve further work are indicated. © Springer-Verlag London Limited 2009.
引用
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页码:117 / 127
页数:10
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