Low-voltage and low-power Ku-band CMOS LNA using capacitive feedback

被引：0
作者：
Farhad Soleimani
Hossein Shamsi
机构：
[1] K. N. Toosi University of Technology,Microelectronic Circuits Laboratory, Faculty of Electrical Engineering
来源：
Analog Integrated Circuits and Signal Processing | 2021年 / 109卷
关键词：
Low power; Low voltage; Circuit layout; Low noise amplifier;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
An ultra-wideband (12–18 GHz) low-noise amplifier (LNA) using a 65 nm CMOS technology is proposed, in which a common-source cascode structure with capacitive feedback technique is employed, leading to the excellent gain flatness. In order to provide the unconditional stability at all frequencies, a notch filter is placed in the input matching network. The post-layout simulation results confirm the S21 of 11.33 ± 0.33 dB, the input/output return loss of −7.5 to −32.7 dB and −10 to −17 dB, respectively. Moreover, reverse isolation (S12) better than 27 dB, noise figure (NF) of 4.6–5.47 dB and third-order input intercept point (IIP3) of −5.39 to −12.32 dB are obtained over the 12–18 GHz band of interest. The LNA power consumption, excluding the output buffer stage, is only 2.2 mW from a 0.8 V power supply. The LNA layout area is 0.255 mm2.
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页码：435 / 447
页数：12
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