共 4 条
[1]
Ubar R.(1999)Single Gate Design Error Diagnosis in Combinational Circuits Proc. Estonian Acad. Sci. Engng. 5 3-21
[2]
Borrione D.(1996)A Method for Automatic Design Error Location and Correction in Combinational Logic Circuits J. Electronic Testing: Theory and Applications 8 113-127
[3]
Wahba A.M.(undefined)undefined undefined undefined undefined-undefined
[4]
Borrione D.(undefined)undefined undefined undefined undefined-undefined