Design of Memristor-Based Combinational Logic Circuits

This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., A·B¯\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$A \cdot \bar{B}$$\end{document}), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, we design some combinational logic circuits, including 1-bit comparator, 3-bit binary encoder, 3-bit binary decoder and 4:1 multiplexer. Furthermore, an improved multifunctional logic module is proposed, which contains one NMOS transistor and five memristors, and can implement AND, OR and XOR logic operations. Using this multifunctional logic module, a 4-bit comparator and a 1-bit full adder are designed. Finally, the proposed combinational logic circuits are verified by LTSPICE simulations. Compared with other memristor-based logic circuits and the traditional CMOS technology, the proposed logic circuits have made great progress in reducing delay, power consumption and the number of transistors.