Verification of Embedded Systems Based on Interval Analysis

被引:0
作者
Iñigo Ugarte
Pablo Sanchez
机构
[1] ETSIIyT,Microelectronics Engineering Group, TEISA Department
[2] University of Cantabria,undefined
来源
International Journal of Parallel Programming | 2005年 / 33卷
关键词
Embedded system verification; interval analysis; assertion-based verification; design for verification;
D O I
暂无
中图分类号
学科分类号
摘要
The latest versions of the “International Technology Roadmap for Semiconductors” (ITRS) highlight that verification has changed from playing a relatively minor supporting role in the design process to becoming the dominant cost. This situation is the result of the exponential growth of the functional complexity of designs and the historical emphasis of CAD tools in other areas of the design process such as automatic synthesis or place-and-route. The problem is even worst in embedded systems that normally integrate functionally complex hardware and software parts. This work presents a new verification technique based on interval analysis that can handle embedded designs described at behavioural level. The proposed technique is able to verify assertions that the users insert in software and hardware tasks. It shows very promising results in systems that cannot be efficiently verified with other tools (e.g. data-dominated designs).
引用
收藏
页码:697 / 720
页数:23
相关论文
共 10 条
[1]  
Holzmann G.(May 1997)The Model Checker SPIN IEEE Transactions On Software Engineering. 23 279-295
[2]  
Fallah F.(August 2001)Functional Vector Generation for HDL Models Using Linear Programming and Boolean Satisfiability IEEE Transactions of Computer-Aided Design of Integrated Circuits and Systems. 20 528-533
[3]  
Nevadas S.(January 1998)Abstraction Techniques for Validation Coverage Analysis and Test Generation IEEE Transaction on Computer. 47 2-14
[4]  
Keutzer K.(August 2003)Raising the Level of Abstraction Reduces Verification for System on Chip The Synopsys Verification Avenue Technical Bulletin. 3 15-20
[5]  
Moundanos D.(August 2003)Complex Instruction and Software Library Mapping for Embedded Software Using Symbolic Algebra IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 22 964-975
[6]  
Abraham J.(undefined)undefined undefined undefined undefined-undefined
[7]  
Schutten R.(undefined)undefined undefined undefined undefined-undefined
[8]  
Peymandoust A.(undefined)undefined undefined undefined undefined-undefined
[9]  
Simunic T.(undefined)undefined undefined undefined undefined-undefined
[10]  
De Micheli G.(undefined)undefined undefined undefined undefined-undefined