Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model

被引:0
作者
Angsuman Sarkar
Swapnadip De
Anup Dey
Chandan Kumar Sarkar
机构
[1] Kalyani Govt. Engg. College,ECE Dept.
[2] Meghnad Saha Institute of Technology,Dept. of ECE
[3] Jadavpur University,ETCE Dept.
来源
Journal of Computational Electronics | 2012年 / 11卷
关键词
Cut-off frequency (; ); Maximum frequency of oscillation (; ); Pseudo 2-D modeling; RF applications; SRG MOSFET; Surface potential; Transconductance generation factor (TGF);
D O I
暂无
中图分类号
学科分类号
摘要
We report a systematic, quantitative investigation of analog and RF performance of cylindrical surrounding-gate (SRG) silicon MOSFET. To derive the model, a pseudo-two-dimensional (2-D) approach applying Gauss’s law in the channel region is extended for the cylindrical SRG MOSFET. Based on surface potential approach, expressions of drain current and differential capacitances are obtained analytically. Analog/RF figures of merit of SRG MOSFET are studied, including transconductance efficiency gm/Id, intrinsic gain, output resistance, cutoff frequency fT, maximum oscillation frequency fmax and gain bandwidth product GBW. The trends related to their variations along the downscaling of dimension are provided. In order to validate our model, the modeled predictions have been extensively compared with the simulated characteristics obtained from the ATLAS device simulator and a nice agreement is observed with a wide range of geometrical parameters.
引用
收藏
页码:182 / 195
页数:13
相关论文
共 208 条
[1]  
Auth C.P.(1997)Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFETs IEEE Electron Device Lett. 18 74-76
[2]  
Plummer J.D.(2000)Analytical description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs IEEE Electron Device Lett. 21 445-447
[3]  
Oh S.H.(2004)5 nm-Gate nanowire FinFET Proc. VLSI Symp. Tech. Dig. 5 196-197
[4]  
Monore D.(2005)Device optimization for digital subthreshold logic operation IEEE Trans. Electron Devices 52 237-247
[5]  
Hergenrother J.M.(1977)CMOS analog integrated circuits based on weak inversion operation IEEE J. Solid-State Circuits SC-12 224-231
[6]  
Yang F.L.(2007)Analog/RF performance of Si nanowire MOSFETs and the impact of process variation IEEE Trans. Electron Devices 54 1288-1294
[7]  
Paul B.C.(2005)Explicit continuous model for long-channel undoped surrounding gate MOSFETs IEEE Trans. Electron Devices 52 1868-1873
[8]  
Raychowdhury A.(1998)An analytical surrounding gate MOSFET model Solid-State Electron. 42 721-728
[9]  
Roy K.(2004)Continuous analytic current–voltage model for surrounding-gate MOSFETs IEEE Electron Device Lett. 25 571-573
[10]  
Vittoz E.(2011)Compact model for long-channel cylindrical surrounding-gate MOSFETs valid from low to high doping concentrations Solid-State Electron. 55 13-18