An 8-bit Folding A/D Converter with a New Interpolation Technique

被引：0

作者：

Evandro Mazina Martins

Elnatan Chagas Ferreira

机构：

[1] Federal University of Mato Grosso do Sul—UFMS,Department of Electrical Engineering—DEL/CCET

[2] Cidade Universitaria,undefined

来源：

Analog Integrated Circuits and Signal Processing | 2004年 / 41卷

关键词：

analog-to-digital converter; folding; interpolation;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

This paper proposes a new interpolation technique for application in a folding A/D converter with interpolation. However, there is not a specific interpolation circuit because this interpolation technique is applied to the folding encoder circuit and to the master latches of the A/D converter. This interpolation technique adds some transistors in the folding encoder circuit, and it adds only three transistors to some master latches. An 8-bit A/D converter has been designed and implemented in a 0.8 μm BiCMOS process, at FT of 12 GHz to evaluate the proposed interpolation technique.

引用

页码：237 / 252

页数：15