An 8-bit Folding A/D Converter with a New Interpolation Technique

被引：0
作者：
Evandro Mazina Martins
Elnatan Chagas Ferreira
机构：
[1] Federal University of Mato Grosso do Sul—UFMS,Department of Electrical Engineering—DEL/CCET
[2] Cidade Universitaria,undefined
来源：
Analog Integrated Circuits and Signal Processing | 2004年 / 41卷
关键词：
analog-to-digital converter; folding; interpolation;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
This paper proposes a new interpolation technique for application in a folding A/D converter with interpolation. However, there is not a specific interpolation circuit because this interpolation technique is applied to the folding encoder circuit and to the master latches of the A/D converter. This interpolation technique adds some transistors in the folding encoder circuit, and it adds only three transistors to some master latches. An 8-bit A/D converter has been designed and implemented in a 0.8 μm BiCMOS process, at FT of 12 GHz to evaluate the proposed interpolation technique.
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页码：237 / 252
页数：15
相关论文
共 26 条
[1]  
van de Grift R.E.J.(1984)A monolithic 8-Bit video A/D converter IEEE Journal of Solid State Circuits SC-19 374-378
[2]  
van de Plassche R.J.(1992)An 8-b 650 MHz folding ADC IEEE Journal of Solid-State Circuits 27 1662-1666
[3]  
Valburg J. v.(1987)An 8-bit video ADC incorporating folding and interpolation techniques IEEE Journal of Solid-State Circuits SC-22 944-953
[4]  
van de Plassche R.J.(1996)CMOS folding A/D converters with current-mode interpolation IEEE Journal of Solid-State Circuits 31 1248-1257
[5]  
van de Grift R.E.J.(1999)Proposal and implementation of a new interpolation technique for a double folding A/D converter Microelectronics Journal 30 1213-1219
[6]  
Rutten I.W.J.M.(1988)An 8-bit 100 MHz fullnyquist analog-to-digital converter IEEE Journal of Solid-State Circuits 23 1334-1344
[7]  
van de Veen M.(1990)A 400 MHz input flash converter with error correction IEEE Journal of Solid-State Circuits 25 184-191
[8]  
Flynn M.P.(1998)A CMOS 6-b, 400-Msample/s ADC with error correction IEEE Journal of Solid-State Circuits 33 1939-1947
[9]  
Allstot D.J.(1997)A 12-b, 60-Msample/s cascaded folding and interpolating ADC IEEE Journal of Solid State Circuits 32 1876-1886
[10]  
Martins E.M.(2001)An 8-b 100-Msample/s CMOS pipelined folding ADC IEEE Journal of Solid State Circuits 36 184-194
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