DSCC-MMC STATCOM Main Circuit Parameters Design Considering Positive and Negative Sequence Compensation

被引:20
作者
Cupertino A.F. [2 ,3 ]
Farias J.V.M. [1 ]
Pereira H.A. [1 ]
Seleme S.I., Jr. [2 ]
Teodorescu R. [4 ]
机构
[1] Department of Electrical Engineering, Universidade Federal de Viçosa, Viçosa, 36570-900, MG
[2] Graduate Program in Electrical Engineering, Federal University of Minas Gerais, Av. Antônio Carlos 6627, Belo Horizonte, 31270-901, MG
[3] Department of Materials Engineering, Federal Center for Technological Education of Minas Gerais, Belo Horizonte, 30421-169, MG
[4] Department of Energy Technology, Aalborg University, Ålborg
关键词
Modular multilevel converter; Negative sequence compensation; Static synchronous compensator;
D O I
10.1007/s40313-017-0349-4
中图分类号
学科分类号
摘要
The double-star chopper cell modular multilevel converter (DSCC-MMC) has been employed in several applications as HVDC, energy storage, renewable energy, electrical drives and STATCOMs. Generally, the DSCC-MMC main circuit parameter design presented in literature considers balanced currents flowing through the converter. Nevertheless, in STATCOM application, the converter can compensate negative sequence components and unbalanced currents flow through the DSCC-MMC, resulting in different stresses in the converter phases. Therefore, this work presents a detailed design methodology of the DSCC-MMC main circuit parameters, considering both positive and negative sequence current compensations. The dc-link voltage, number of submodules, power semiconductor thermal stresses, submodule capacitance and arm inductances are designed. Expressions for the energy storage requirements are derived when negative sequence is compensated. A case study considering a 15-MVA STATCOM is presented, and simulation results validate the proposed design methodology. Finally, the converter power losses and thermal stresses in the power semiconductors are evaluated. © 2017, Brazilian Society for Automatics--SBA.
引用
收藏
页码:62 / 74
页数:12
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