DPAD2 is a Field Programmable Analog Array (FPAA) based on CMOS switched capacitor technology. This paper describes the major design decisions that went into creating DPAD2 with respect to the ultimate goal of the work, being a mixed signal field programmable silicon solution. Two major compromises exist in the design of an FPAA, one between flexibility and performance, the other between functionality and die size; DPAD2 overcomes the first with a novel field programmable hierarchic routing scheme and the second by careful analysis of many disparate designs to arrive at a best compromise solution. Results from prototype silicon are presented where a single analog cell is reconfigured to perform a number of different analog signal processing functions. Bandwidth of the DPAD2 device is 500 kHz and the SNR is typically 60 dB, although both are application dependent. Introduction of the FPAA now enables a designer to have working silicon within one day, by a simple configuration of the silicon chip via a PC parallel interface. Software libraries of analog circuits are provided and allow very rapid creation of large and complex analog circuits.
