Analysis of large deviations behavior of multi-GPU memory access in deep learning

被引:0
作者
P. S. Tamizharasan
N. Ramasubramanian
机构
[1] National Institute of Technology,Department of Computer Science & Engineering
来源
The Journal of Supercomputing | 2018年 / 74卷
关键词
Multi-GPUs; Large deviations; Memory divergence; Deep learning;
D O I
暂无
中图分类号
学科分类号
摘要
The unpredictable nature of irregular memory accesses in a mixed memory applications such as deep learning application poses many challenges due to the communication issues. Typically, a multi-GPU node that has a large number of simultaneous memory requests consumes almost 80% of the processing time for memory mapping. This calls for characterization of mixed regular and irregular memory accesses so that memory divergence can be simplified to improve performance. In this paper, using large deviations principle, it is shown that the mixed regular and irregular memory accesses can be viewed as a combination of continuous and discrete functions. This view point is proved to give better performance through characterization of memory divergence in multi-GPU node using the sub-additivity property. Further, a detection test procedure based on quenched large deviations model is proposed which generates threshold values for optimizing the memory mapping in data intensive applications and hence it will improve the performance.
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页码:2199 / 2212
页数:13
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[1]  
Alsmirat MA(2017)Accelerating compute intensive medical imaging segmentation algorithms using hybrid CPU–GPU implementations Multimed Tools Appl 76 3537-3555
[2]  
Jararweh Y(1998)On the large deviations behavior of acyclic networks of Ann Appl Probab 8 1027-1069
[3]  
Al-Ayyoub M(2012) queues IEEE Commun Lett 16 913-916
[4]  
Shehab MA(2008)On large deviations of HARQ with incremental redundancy over fading channels Ann Probab 36 397-419
[5]  
Gupta BB(2012)Large deviations IEEE Trans Comput 61 1386-1400
[6]  
Bertsimas D(2017)Robust pipelined memory system with worst case performance guarantee for network processing J Supercomput 73 1691-1714
[7]  
Paschalidis IC(2016)Topology mapping of irregular parallel applications on torus-connected supercomputers IEEE Comput Archit Lett 15 117-120
[8]  
Tsitsiklis JN(undefined)Studying inter-warp divergence aware execution on gpus undefined undefined undefined-undefined
[9]  
Choi J(undefined)undefined undefined undefined undefined-undefined
[10]  
Varadhan S(undefined)undefined undefined undefined undefined-undefined