Digital Signal Processing with Interleaved ADC Systems

This paper addresses a problem associated with interleaved ADC systems from the digital signal processing algorithm design perspective. The output streams of an interleaved ADC system are inherently in parallel format. It would be nice if DSP algorithms can be designed to take advantage of the inherently parallel signal streams in the interleaved ADC system without the need of a high speed parallel-to-serial multiplexer. Frequency response of a parallel filter bank is derived. It is found that the overall frequency response is the average of each individual interpolated channel filter plus the aliasing components. The aliasing components come from the deviation of each individual channel from the average response.