NLR-OP: a high-performance optical router based on North-Last turning model for multicore processors

Regarding the increase in the number of cores in the electronic network-on-chip, they may not be an ideal choice in the response of needing latency, power, and reliability. However, this problem has been effectively solved by proposing photonic network-on-chips (PNoCs). The optical routers play an indispensable role in the PNoCs. So far, multiple routers for different architectures of PNoC have been proposed. The most of optical routers are based on micro-ring resonators (MRRs), while Mach–Zehnder interferometers (MZIs) are preferable for optical router design due to their high thermal tolerance and potential for large capacity. In this research, a 4 × 4 non-blocking optical router based on Mach–Zehnder interferometer is proposed. The router is designed for a deadlock-free North-Last turning model, called NLR-OP. The NLR-OP non-blocking optical router is extended to improve network performance and physical layer parameters for a wide range of silicon nano-photonic multicore interconnection topologies. Moreover, assigning 30 dB to the optical power budget for interconnection using the NLR-OP router allows the Non-blocking Torus to expand to 196 nodes. Compared to previously reported router designs, this router design allows quantifying the improvement in system performance parameters in terms of insertion loss for well-known photonic interconnection topologies. For instance, applying the NLR-OP optical router in the Non-blocking Torus topology leads to a 38% reduction insertion loss in comparison with the previously highest performing optical router design. The routing performance of this router is simulated by the successful transmission of a 20-Gbps optical signal at the wavelength range of 1548 nm to 1557 nm for each qualified port from a choice of 10 possible physical links.