FPGA implementation of fractional-order discrete memristor chaotic system and its commensurate and incommensurate synchronisations

被引:0
|
作者
Anitha Karthikeyan
Karthikeyan Rajagopal
机构
[1] University of Technology,Department of Electrical and Communication Engineering
[2] Defence University,Center for Nonlinear Dynamics
来源
Pramana | 2018年 / 90卷
关键词
Memristor; discretisation; fractional order; synchronisation; field programmable gate arrays; 05.45.–a;
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学科分类号
摘要
A new fourth-order memristor chaotic oscillator is taken to investigate its fractional-order discrete synchronisation. The fractional-order differential model memristor system is transformed to its discrete model and the dynamic properties of the fractional-order discrete system are investigated. A new method for synchronising commensurate and incommensurate fractional discrete chaotic maps are proposed and validated. Numerical results are established to support the proposed methodologies. This method of synchronisation can be applied for any fractional discrete maps. Finally the fractional-order memristor system is implemented in FPGA to show that the chaotic system is hardware realisable.
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