An isolated symmetrical 2T2R cell enabling high precision and high density for RRAM-based in-memory computing

In-memory computing (IMC), leveraging emerging memories, holds significant promise in overcoming memory limitations and improving energy efficiency. However, the prevailing IMC array structure based on serially connected transistors and memory cells (1T1R/2T2R), along with the signed weight mapping scheme, can lead to asymmetrical weight sensing issues (AWS) due to electrical asymmetry within the 1T1R/2T2R structure, particularly in highly scaled cells where the transistor's resistance becomes significant. In this paper, we propose and fabricate an electrically symmetric memory cell based on a physically isolated 2T2R structure for IMC. This design aims to enhance the precision and density of RRAM-based IMC arrays. The 2T2R cells are manufactured using the back-end-of-line (BEOL) process of a commercial 40 nm technology platform. The feasibility of this design is verified through measured and simulated results, showcasing its capability to address the issue of AWS. Compared to conventional 2T2R cells, this design achieves a considerably smaller transistor footprint without compromising accuracy, while also improving integration density by 42.2%. These innovative memory cell advancements have the potential to further advance high-energy-efficient IMC technology.