Comparing an FPGA to a Cell for an Image Processing Application

被引:0
作者
Ryan N. Rakvic
Hau Ngo
Randy P. Broussard
Robert W. Ives
机构
[1] U.S. Naval Academy,Department of Electrical and Computer Engineering
[2] U.S. Naval Academy,Department of Systems Engineering
来源
EURASIP Journal on Advances in Signal Processing | / 2010卷
关键词
Field Programmable Gate Array; Iris Recognition; Cell Processor; Assembly Instruction; VHDL Code;
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摘要
Modern advancements in configurable hardware, most notably Field-Programmable Gate Arrays (FPGAs), have provided an exciting opportunity to discover the parallel nature of modern image processing algorithms. On the other hand, PlayStation3 (PS3) game consoles contain a multicore heterogeneous processor known as the Cell, which is designed to perform complex image processing algorithms at a high performance. In this research project, our aim is to study the differences in performance of a modern image processing algorithm on these two hardware platforms. In particular, Iris Recognition Systems have recently become an attractive identification method because of their extremely high accuracy. Iris matching, a repeatedly executed portion of a modern iris recognition algorithm, is parallelized on an FPGA system and a Cell processor. We demonstrate a 2.5 times speedup of the parallelized algorithm on the FPGA system when compared to a Cell processor-based version.
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