High energy-efficient partial floating capacitor array DAC scheme for SAR ADCs

A high energy saving and high linearity switching method of successive approximation register analogue-to-digital converters is presented. The proposed method can achieve high energy savings and high linearity due to the fact that the partial floating and split capacitor techniques are combined. This scheme has no reset energy consumption, and achieves purely 98.63% less switching energy and 75% reduction of the total capacitance over the conventional switching scheme. Moreover, the proposed scheme achieves Differential Nonlinearity and Integral Nonlinearity only 0.140LSB and 0.122LSB, respectively.