Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power Applications

被引:0
作者
Rohit Dhiman
Rajeevan Chandel
机构
[1] National Institute of Technology Hamirpur,Department of Electronics and Communication Engineering
来源
Circuits, Systems, and Signal Processing | 2015年 / 34卷
关键词
Sub-threshold; Very large scale integration (VLSI); Ultra-low power; Interconnects; Complementary metal-oxide semiconductor (CMOS); Crosstalk;
D O I
暂无
中图分类号
学科分类号
摘要
Ultra-low power circuit design has received a wide attention due to the fast growth and prominence of portable battery-operated devices with stringent power constraint. Though sub-threshold circuit operation shows huge potential toward satisfying the ultra-low power requirement, it holds challenging design issues. Of these, the increased crosstalk and delay have become serious challenges, particularly for sub-threshold interconnects as integration density increases with every scaled technology node. Consequently, in this paper an analytical approach providing closed form expressions for dynamic crosstalk in coupled interconnects under sub-threshold condition has been proposed. The proposed model is based on the sub-threshold current–voltage expression for a metal-oxide semiconductor transistor. The model determines the propagation delay and timings of the aggressor and victim drivers for the conditions when inputs are switching in-phase and out-of-phase. Subsequently, the transient analysis of dynamic crosstalk is carried out. The comparison of analytical results with SPICE shows that the model captures waveform shape, propagation delay, and timing with good accuracy, with less than 5 % error in timing estimation.
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页码:21 / 40
页数:19
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