A Novel Deep Gate LDMOS Structure Using Double P-Trench to Improve the Breakdown Voltage and the On-State Resistance

被引:0
作者
Amir Gavoshani
Ali A. Orouji
Abdollah Abbasi
机构
[1] Semnan University,Electrical and Computer Engineering Department
来源
Silicon | 2022年 / 14卷
关键词
SOI-LDMOS; P-trench; Breakdown voltage; Maximum temperature; Deep gate; On-state resistance;
D O I
暂无
中图分类号
学科分类号
摘要
To increase the breakdown voltage and reduce the on-state resistance, a novel Lateral Double Diffused Metal Oxide Semiconductor (LDMOS) field-effect transistor is proposed in this paper. In the proposed structure, double P-trenches are inserted in the buried oxide under the source and drain regions. The proposed device is called as the double p-trench deep gate LDMOS (DPTDG-LDMOS). By optimizing the P-trenches, the electric field will be more uniform, and so the maximum breakdown voltage obtains. Our simulation results show that the breakdown voltage, on-state resistance, maximum temperature (TMAX), and figure of merit (FOM) for the DPTDG-LDMOS are improved in comparison with a conventional LDMOS.
引用
收藏
页码:597 / 602
页数:5
相关论文
共 43 条
[1]  
Matsumoto S(1995)Switching characteristics of a thin film SOI power MOSFET Jpn J Appl Phys 34 817-821
[2]  
Kim I(1992)Optimized trench Mosfet technologies for power devices IEEE Trans. Electron Devices 39 1435-1443
[3]  
Sakai T(2004)Optimum design for minimum on-resistance of low voltage trench power MOSFET Microelectron J 35 287-289
[4]  
Fukumitsu T(2015)High figure-of-merit SOI power LDMOS for power integrated circuits Eng Sci Technol an Int J 18 141-149
[5]  
Yachi T(2020)A silicon on nothing LDMOS with two air pillars in gate insulator for power applications Silicon 12 2581-2586
[6]  
Shenai K(2017)An impressive structure containing triple trenches for RF power performance (TT-SOI-MESFET) J Comput Electron 17 230-237
[7]  
Hong JH(2000)120 V interdigitated-drain LDMOS (IDLDMOS) on SOI substrate breaking power LDMOS limit IEEE Trans Electron Devices 47 1980-1985
[8]  
Chung SK(2016)Superlattices and microstructures symmetrical SOI MESFET with a dual cavity region (DCR-SOI MESFET) to promote high-voltage and radio-frequency performances Superlattice Microst 98 492-503
[9]  
Choi YI(2017)Creation of a new high voltage device with capable of enhancing driving current and breakdown voltage Mater Sci Semicond Process 60 60-65
[10]  
Singh Y(2010)Double window partial SOI-LDMOSFET: a novel device for breakdown voltage improvement Phys E Low-Dimensional Syst Nanostructures 43 498-502