Algorithmic aspects of area-efficient hardware/software partitioning

被引:0
作者
Wu Jigang
Thambipillai Srikanthan
机构
[1] Nanyang Technological University,Centre for High Performance Embedded Systems
来源
The Journal of Supercomputing | 2006年 / 38卷
关键词
Heuristic algorithm; Dynamic programming; Complexity; Hardware/software partitioning; Embedded system;
D O I
暂无
中图分类号
学科分类号
摘要
Area efficiency is one of the major considerations in constraint aware hardware/software partitioning process. This paper focuses on the algorithmic aspects for hardware/software partitioning with the objective of minimizing area utilization under the constraints of execution time and power consumption. An efficient heuristic algorithm running in O(n log n) is proposed by extending the method devised for solving the 0-1 knapsack problem. Also, an exact algorithm based on dynamic programming is proposed to produce the optimal solution for small-sized problems. Simulation results show that the proposed heuristic algorithm yields very good approximate solutions while dramatically reducing the execution time.
引用
收藏
页码:223 / 235
页数:12
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