Interfacial reaction between Au and Sn films electroplated for LED bumps

被引:0
作者
M. L. Huang
Y. Liu
J. X. Gao
机构
[1] Dalian University of Technology,Electronic Packaging Materials Laboratory, School of Materials Science & Engineering
来源
Journal of Materials Science: Materials in Electronics | 2011年 / 22卷
关键词
Flip Chip; Reflowing Time; AuSn Phase; Au5Sn Phase; Interstitial Diffusion Mechanism;
D O I
暂无
中图分类号
学科分类号
摘要
Au-20 wt% Sn eutectic solder is used as bumps in flip chip package of power LED (Light Emitting Diode) due to its excellent properties. The Au/Sn dual-layer films were fabricated on Si wafer by pulse electroplating of Au and Sn sequentially, and the solid–solid interfacial reaction during aging and the eutectic reaction during reflow soldering were investigated in the present work. After storage at room temperature for 1 week, three phases of AuSn, AuSn2 and AuSn4 were sequentially formed at the Au/Sn (10 μm/10 μm) interface, and the thickness of this reaction region was about 5 μm. Firstly, AuSn4 was formed at the Au/Sn interface, and then AuSn and AuSn2 were formed at the Au/AuSn4 interface. After aging at 150 °C for 5 and 10 h, a similar layered structure of AuSn/AuSn2/AuSn4 was also observed. Due to the faster diffusion of Au to Sn layer, all the Sn elements were consumed after aging at 150 °C for 15 h and AuSn4 layer gradually transformed into AuSn and AuSn2 layers. For the specimen of Au/Sn (9 μm/6 μm) films on Si chip, a bamboo-shoot-like microstructure of Au5Sn/AuSn/AuSn2 was formed in the reaction region after reflowed at 280 °C for 10 s; while a typical two-phase (Au5Sn and AuSn) eutectic microstructure was formed after reflowed at 280 °C for 60 s.
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页码:193 / 199
页数:6
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