Design and implementation of a new light to digital converter for the PPG sensor

This study proposes the design of a light to digital converter (LDC) for the long-time continuous monitoring of the photoplethysmography (PPG) signal. The design system incorporates a transimpedance amplifier (TIA), a delta-sigma modulator (DSM), and a decimation filter. The analog front-end circuit is implemented in the integrated chip with the chip area of 2.76 mm2 and fabricated via TSMC T18 process. The standard supply voltage used for the experiment is 1.8 V. The measurement result shows that the TIA – 3 db gain is 100 dB gain and – 3 dB cutoff frequency is 110 kHz. The design delta-sigma modulator can achieve the signal to noise plus distortion ratio (SNDR) of 50 dB at – 10 dB of the input signal. The measured signal to spurious-free dynamic range (SFDR) of the DSM is 50 dB. The measured effective number of the bit is (ENOB) of 8.3 bits. The on-chip 4th order decimation filter is used herein to convert the one-bit output of the DSM to the multibit output with a down sampling rate of 64 Hz. The measured cutoff frequency of the decimation filter is 10 Hz, and the operating sampling frequency is 1280 samples/seconds. Therefore, the overall designed bandwidth of the design system is 10 Hz bandwidth. The power consumption of the whole circuit is less than 100 µW. The achieved bandwidth of 10 Hz is the best among all the reported to date.