Design of a Wide Band, Low-Noise Differential Voltage Controlled Ring Oscillator in 90 nm CMOS Process

This paper presents a low noise, differential voltage controlled ring oscillator (VCRO) with a wide tuning range. A CMOS varactor based differential delay cell has also been proposed, which not only minimizes phase noise but reduces the power consumption and chip area of the VCRO, as well. The VCRO has been implemented in UMC 90 nm 1P-9M Cu with low-K SP, CMOS process technology. The frequency tuning range of the proposed VCRO is 852.8 MHz to 5.98 GHz and the controlling voltage range is 0–0.8 V. The phase noise observed was − 102.4 dBc/Hz at an offset of 1 MHz. The proposed VCRO consumes a power of 1.19 mW at a supply voltage of 1 V and occupies a chip area of 35 × 50 μm2.