Investigating the Source Stack Engineering Effect on the Drive Current of a Tunneling Field Effect Transistor

In this Research, the Effect of Source Stack Engineering on the Drive Current of a Proposed Silicon on Insulator-Tunnel FET (SOI-TFET) Is Investigated. The Proposed TFET Scheme Is Similar to a Conventional TFET, but there Is a P+ Doping Stack above the Source Region. Our Simulation Results Reveals that the Presence of Source Stack Increases the Electric Field, Lowers Tunneling Width and Then Enhances Band to Band Tunneling Rate in the Tunneling Junction of the Device. It Is Demonstrated that when theSiO2 Lip Length above Source Region Sets to 4 Nm and Silicon Stack Height Is 7 Nm, the Highest Drive Current Can Be Achieved. Moreover, Ion/Ioff Ratio of More than 2*1011 with Negligible Leakage Current (<0.1 fA) in the Proposed Device Indicates that this TFET Is among Promising Candidates for Low Power and High Performance Applications