Defining Better Test Strategies with Tradespace Exploration Techniques and Pareto Fronts: Application in an Industrial Project

被引:10
作者
Salado, Alejandro [1 ]
机构
[1] Virginia Tech, Grado Dept Ind & Syst Engn, Blacksburg, VA 24061 USA
关键词
verification; test; tradespace exploration; Pareto front; system design and analysis; CONCEPT SELECTION; SYSTEMS; ARCHITECTURE; FRAMEWORK; DECISION;
D O I
10.1002/sys.21332
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Test strategies are usually defined following a point-design like method. Starting with a set of verification requirements and programmatic constraints, and usually with a generic test sequence, a baseline test approach is defined. Then, the baseline is optimized until an acceptable strategy is found. Academia has consistently shown however the benefits of using tradespace exploration techniques instead of point-based designs. Some industrial applications seem to corroborate such findings. Yet, both academia and industry have limited the use of tradespace exploration techniques to selecting design concepts. This paper proposes that broadening the use of tradespace exploration techniques and Pareto frontiers to other activities in the field of systems engineering domain yields similar benefits. In particular, this paper presents the actual application of tradespace exploration techniques and Pareto frontiers in an industrial context to select a test strategy for a system. This paper provides thus three main contributions. First, the paper demonstrates that tradespace exploration and Pareto frontiers can be beneficial beyond concept selection. Second, the paper presents a process to use tradespace exploration techniques and Pareto frontiers for selecting test strategies. Finally, the paper showcases the application of the proposed technique and process in a real industrial setup, which yielded a number of lessons learnt. (C) 2016 Wiley Periodicals, Inc.
引用
收藏
页码:639 / 658
页数:20
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