Evaluation and Modeling of Voltage Stress-Induced Hot Carrier Effects in High-Speed SiGe HBTs

被引：0

作者：

Sasso, Grazia ^{[1
]}

Maneux, Cristell ^{[2
]}

Boeck, Josef ^{[3
]}

d'Alessandro, Vincenzo ^{[1
]}

Aufinger, Klaus ^{[3
]}

Zimmer, Thomas ^{[2
]}

Rinaldi, Niccolo ^{[1
]}

机构：

[1] Univ Naples Federico II, Dept Elect Engn & Informat Technol, Via Claudio 21, I-80125 Naples, Italy

[2] Univ Bordeaux, IMS, Bordeaux, France

[3] Infineon Technol AG, Neubiberg, Germany

来源：

2014 IEEE COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT SYMPOSIUM (CSICS): INTEGRATED CIRCUITS IN GAAS, INP, SIGE, GAN AND OTHER COMPOUND SEMICONDUCTORS | 2014年

关键词：

Degradation models; hot carrier effects; reliability; reverse EB stress; RF devices; SiGe HBT;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Hot-carrier degradation analysis and modeling of 240/380 GHz fT/fMAX SiGe HBTs are addressed. A proper stress bias setup is proposed, suitable for the evaluation of RF performance during stress interruption. The impact of stress conditions, lateral scaling and device layout is discussed. An analytical model is proposed, which predicts base current degradation, including its dependence upon stress voltage, stress duration, and emitter geometry, and contributes to understand the physical background of the phenomena.

引用

页数：4

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